VerifLabs – a venture from CVC Pvt.Ltd.
Overview : Functional Verification is one of the most time-consuming processes in ASIC design cycle; yet a structured introductory course/training/education on this topic is often missing. Neither the educational institutes offer this nor there are vendors offering such training. While several language specific courses are offered by EDA vendors, a comprehensive training on fundamentals of functional verification is lacking. CFV course gives you an in-depth introduction to the different aspects of functional verification including different testbench architectures, their relative merits, demerits, areas of application of each architecture etc. CFV then delves into what is a good testbench, and elements of a modern day testbench. It covers all aspects of functional verification ranging from verification architecture to building testbenches, gate level simulation and various technologies used in verification such as simulation, formal, emulation.
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